Distinguished Speakers

Rolf Drechsler

IEEE Fellow, University of Bremen, Germany

Rolf Drechsler

IEEE Fellow, University of Bremen, Germany

A small river named Duden flows by their place and supplies it with the necessary
Kausik Roy

IEEE Fellow, Purdue University, USA

Kausik Roy

IEEE Fellow, Purdue University, USA

A small river named Duden flows by their place and supplies it with the necessary
Subhasish Mitra

ACM/IEEE Fellow, Stanford University, USA

Subhasish Mitra

ACM/IEEE Fellow, Stanford University, USA

A small river named Duden flows by their place and supplies it with the necessary

Distinguished Leader

Prith Banerjee

IEEE Fellow, SVP, Synopsys Innovation, USA

Prith Banerjee

IEEE Fellow, SVP, Synopsys Innovation, USA

A small river named Duden flows by their place and supplies it with the necessary

Sanjay Churiwala

AMD, India

A small river named Duden flows by their place and supplies it with the necessary
V. Kamakoti

IIT Madras

V. Kamakoti

IIT Madras

A small river named Duden flows by their place and supplies it with the necessary

Advisory Council

Satya Gupta

VSI

A small river named Duden flows by their place and supplies it with the necessary
B. B. Bhattacharya

ISI Kolkata, India

B. B. Bhattacharya

ISI Kolkata, India

A small river named Duden flows by their place and supplies it with the necessary
Susmita Sur-Kolay

ISI Kolkata, India

Susmita Sur-Kolay

ISI Kolkata, India

A small river named Duden flows by their place and supplies it with the necessary
Indranil Sengupta

IIT KGP, India

Indranil Sengupta

IIT KGP, India

A small river named Duden flows by their place and supplies it with the necessary

Sanjay Churiwala

AMD, India

A small river named Duden flows by their place and supplies it with the necessary
Pradip K. Dutta

Synopsys, India

Pradip K. Dutta

Synopsys, India

A small river named Duden flows by their place and supplies it with the necessary
Sambit Sahu

OLA Krutim, India

Sambit Sahu

OLA Krutim, India

A small river named Duden flows by their place and supplies it with the necessary
Mrinal Das

Synopsys, India

Mrinal Das

Synopsys, India

A small river named Duden flows by their place and supplies it with the necessary
Niraj Jha

Princeton University, USA

Niraj Jha

Princeton University, USA

A small river named Duden flows by their place and supplies it with the necessary
Koushik Roy

Purdue University, USA

Koushik Roy

Purdue University, USA

A small river named Duden flows by their place and supplies it with the necessary

Krishnendu Chakrabarty

ASU, USA

A small river named Duden flows by their place and supplies it with the necessary
Partha Pratim Chakrabarti

Indian Institute of Technology Kharagpur, India

Partha Pratim Chakrabarti

Indian Institute of Technology Kharagpur, India

A small river named Duden flows by their place and supplies it with the necessary
Partha Pratim Das

Indian Institute of Technology Kharagpur, India

Partha Pratim Das

Indian Institute of Technology Kharagpur, India

A small river named Duden flows by their place and supplies it with the necessary

ISVLSI 2026

The 2026 Symposium explores emerging trends and novel ideas and concepts covering a broad range of topics in the area of VLSI: from VLSI circuits, systems and design methods, to system level design issues, to bringing VLSI design to new areas and technologies such as nano- and molecular devices, security, artificial intelligence, and Internet-of-Things, etc. Future design methodologies and new EDA tools are also a key topic at the Symposium. Over three decades the Symposium has been a unique forum promoting multidisciplinary research and new visionary approaches in the area of VLSI, bringing together leading scientists and researchers from academia and industry. Accepted papers will be submitted for inclusion into IEEE Xplore subject to meeting IEEE Xplore’s scope and quality requirements. Selected high quality papers will be further invited for submission to a journal special issue. The Symposium has established a reputation in bringing together well-known international scientists as invited speakers. The emphasis on high quality will continue at this and future editions of the Symposium.

Important Dates

Paper Submission Deadline:
February 10th, 2026 (AoE)
Acceptance Notification:
May 10th, 2026
Submission of Final Version:
May 30th, 2026
Special Session Proposal Deadline:
March 15th, 2026

Contributions are sought in the following tracks:

  • Circuits, Reliability, and Fault-Tolerance (CRT):
    Analog/mixed-signal circuits design and testing, RF and communication circuits, adaptive circuits and interconnects, design for testability, online testing techniques, static and dynamic defect- and fault- recoverability, variation aware design, VLSI aspects of sensor and sensor network.
  • Computer-Aided Design and Verification (CAD):
    Hardware/software co-design, logic and behavioral synthesis, simulation and formal verification, physical design, signal integrity, power and thermal analysis, statistical approaches.
  • Digital Circuits and FPGA based Designs (DCF):
    Digital circuits, chaos/neural/fuzzy-logic circuits, high speed/low-power circuits, energy efficient circuits, near and sub-threshold circuits, memories, FPGA designs, FPGA based systems.
  • Emerging and Post-CMOS Technologies (EPT):
    Nanotechnology, molecular electronics, quantum devices, optical computing, spin-based computing, biologically-inspired computing, CNT, SET, RTD, QCA, reversible logic, and CAD tools for emerging technology devices and circuits.
  • System Design and Security (SDS):
    Structured and custom design methodologies, microprocessors/micro-architectures for performance and low power, embedded processors, analog/digital/mixed-signal systems, NoC, power and temperature aware designs, hardware security, cryptography, watermarking, and IP protection, TRNG and security-oriented circuits, PUF circuits.
  • VLSI for Applied and Future Computing (AFC):
    Neuromorphic and brain-inspired computing, quantum computing, circuits and architectures for machine learning and artificial intelligence, methodologies for on-chip learning, deep learning acceleration techniques, applications for and use-cases of learning systems, sensor and sensor network, electronics for Internet of Things and smart medical devices.

Author Guidelines

Paper Submission: Authors are invited to submit full-length (6 pages maximum), original, unpublished papers along with an abstract of at most 200 words. Previously published papers or papers currently under review for other conferences/journals should NOT be submitted and will not be considered. To enable blind review, the author list should be omitted from the main document. The manuscript as a single PDF is to be submitted online through Easychair. The IEEE Manuscript Template for Conference Proceedings should be used, which can be found here.

More information can be found on the Paper Submission page.

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