Call for Late Breaking Results (LBR)
ISVLSI 2026 | ITC Sonar, Kolkata, India | July 7–10, 2026
We are pleased to announce that ISVLSI 2026 will feature a Late Breaking Results (LBR) track. The LBR track provides authors an opportunity to present new findings, preliminary results, and work-in-progress that were not available during the regular paper submission process.
Accepted LBR contributions will be presented as posters at the symposium and their 1-page extended abstracts will be included in the official ISVLSI 2026 conference brochure and conference website.
Scope and Topics
- Circuits, Reliability, and Fault-Tolerance (CRT): Analog/mixed-signal circuits, RF circuits, variation-aware design, design for testability, sensor circuits
- Computer-Aided Design and Verification (CAD): Hardware/software co-design, logic and behavioral synthesis, simulation and formal verification, physical design
- Digital Circuits and FPGA-Based Designs (DCF): High-speed and low-power circuits, energy-efficient design, memories, FPGA designs and FPGA-based systems
- Emerging and Post-CMOS Technologies (EPT): Nanotechnology, quantum devices, optical computing, spin-based computing, biologically-inspired computing, reversible logic
- System Design and Security (SDS): Microprocessors and micro-architectures, embedded processors, NoC, hardware security, cryptography, PUF circuits
- VLSI for Applied and Future Computing (AFC): Neuromorphic computing, quantum computing, circuits and architectures for ML/AI, on-chip learning, deep learning acceleration, edge intelligence, IoT
Submission Guidelines
Authors are invited to submit a 1-page extended abstract (including figures and references) formatted according to the IEEE conference template.
Submissions should clearly describe the novelty and significance of the results, methodology, and key findings.
Submission format: 1-page IEEE-formatted extended abstract (PDF). Use the standard IEEE conference templates available at https://www.ieee.org/conferences/publishing/templates.html
Submission site: EasyChair (ISVLSI 2026), selecting the “Late Breaking Results” track. See the Paper Submission page on the ISVLSI 2026 website for details.
All LBR submissions will be reviewed by at least two members of the technical program committee. Acceptance decisions will be based on the novelty, technical quality, and relevance of the results to the ISVLSI community.
Presentation and Proceedings
Authors of accepted LBR abstracts will present their work as research posters during a dedicated LBR poster session at the symposium.
The 1-page extended abstracts of all accepted LBR contributions will be included in the official ISVLSI 2026 conference brochure and conference website.
At least one author of each accepted LBR abstract must register for the conference and present the poster in person.
Best LBR Poster Award
All accepted LBR posters will be eligible for the Best Late Breaking Results Poster Award. The award committee will evaluate posters based on the novelty and significance of the results, the quality of the poster presentation, and the clarity of the technical communication. The winner will be announced during the closing ceremony of the symposium.
Contact
Dr. Gourav Datta
Assistant Professor, Department of Electrical, Computer, and Systems Engineering
Case Western Reserve University, Cleveland, OH, USA
